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ramips: mt762{0,8}: reduce default MMC clock to 24 MHz
The upstream mtk-sd driver did not perform specific timing optimization for MT762x series SoC, hence the SDHC peripheral of some boards cannot run at too high frequency. Reduce the maximum clock frequency to fix the mmc read/write error. Closes: https://github.com/openwrt/openwrt/issues/17364 Signed-off-by: Shiji Yang <yangshiji66@qq.com> Link: https://github.com/openwrt/openwrt/pull/17375 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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@ -540,7 +540,7 @@
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interrupt-parent = <&intc>;
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interrupts = <14>;
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max-frequency = <48000000>;
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max-frequency = <24000000>;
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&sdhci_pins>;
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@ -108,10 +108,6 @@
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};
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};
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&sdhci {
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max-frequency = <24000000>;
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};
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&wmac {
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pinctrl-names = "default", "pa_gpio";
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pinctrl-0 = <&pa_pins>;
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@ -394,7 +394,7 @@
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interrupt-parent = <&intc>;
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interrupts = <14>;
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max-frequency = <48000000>;
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max-frequency = <24000000>;
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&sdxc_pins>;
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