ramips: mt762{0,8}: reduce default MMC clock to 24 MHz

The upstream mtk-sd driver did not perform specific timing
optimization for MT762x series SoC, hence the SDHC peripheral
of some boards cannot run at too high frequency. Reduce the
maximum clock frequency to fix the mmc read/write error.

Closes: https://github.com/openwrt/openwrt/issues/17364
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Link: https://github.com/openwrt/openwrt/pull/17375
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Shiji Yang 2024-12-25 20:33:23 +08:00 committed by Hauke Mehrtens
parent df222e57be
commit de0c143742
3 changed files with 2 additions and 6 deletions

View File

@ -540,7 +540,7 @@
interrupt-parent = <&intc>;
interrupts = <14>;
max-frequency = <48000000>;
max-frequency = <24000000>;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&sdhci_pins>;

View File

@ -108,10 +108,6 @@
};
};
&sdhci {
max-frequency = <24000000>;
};
&wmac {
pinctrl-names = "default", "pa_gpio";
pinctrl-0 = <&pa_pins>;

View File

@ -394,7 +394,7 @@
interrupt-parent = <&intc>;
interrupts = <14>;
max-frequency = <48000000>;
max-frequency = <24000000>;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&sdxc_pins>;