From e23885875767b768251b6b5edd743246ef17efb8 Mon Sep 17 00:00:00 2001 From: mleaf <350983773@qq.com> Date: Mon, 10 Feb 2020 05:29:08 -0800 Subject: [PATCH] ipq40xx: Add SD/MMC controller support --- ...4019-Add-SDHCI-VQMMC-LDO-regulator-n.patch | 33 +++++++++++++++ .../853-add-sdhci-msm-node-to-dts.patch | 41 +++++++++++++++++++ 2 files changed, 74 insertions(+) create mode 100644 target/linux/ipq40xx/patches-4.19/852-ARM-dts-qcom-ipq4019-Add-SDHCI-VQMMC-LDO-regulator-n.patch create mode 100644 target/linux/ipq40xx/patches-4.19/853-add-sdhci-msm-node-to-dts.patch diff --git a/target/linux/ipq40xx/patches-4.19/852-ARM-dts-qcom-ipq4019-Add-SDHCI-VQMMC-LDO-regulator-n.patch b/target/linux/ipq40xx/patches-4.19/852-ARM-dts-qcom-ipq4019-Add-SDHCI-VQMMC-LDO-regulator-n.patch new file mode 100644 index 0000000000..fdb3f8bbcc --- /dev/null +++ b/target/linux/ipq40xx/patches-4.19/852-ARM-dts-qcom-ipq4019-Add-SDHCI-VQMMC-LDO-regulator-n.patch @@ -0,0 +1,33 @@ +From beae4078c07d3cdc90473a2b35eb0d2b4f3c922c Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sat, 14 Sep 2019 23:13:17 +0200 +Subject: [PATCH] ARM: dts: qcom: ipq4019: Add SDHCI VQMMC LDO regulator node + +IPQ4019 has a built in SD/eMMC controller which depends on +VQMMC LDO regulator working. +Since we have a driver for it lets add the appropriate node for it. + +Signed-off-by: Robert Marko +--- + arch/arm/boot/dts/qcom-ipq4019.dtsi | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -216,6 +216,16 @@ + interrupts = ; + }; + ++ vqmmc: regulator@1948000 { ++ compatible = "qcom,ipq4019-vqmmc-regulator"; ++ reg = <0x01948000 0x4>; ++ regulator-name = "vqmmc"; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-always-on; ++ status = "disabled"; ++ }; ++ + blsp_dma: dma@7884000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x07884000 0x23000>; diff --git a/target/linux/ipq40xx/patches-4.19/853-add-sdhci-msm-node-to-dts.patch b/target/linux/ipq40xx/patches-4.19/853-add-sdhci-msm-node-to-dts.patch new file mode 100644 index 0000000000..4450d48501 --- /dev/null +++ b/target/linux/ipq40xx/patches-4.19/853-add-sdhci-msm-node-to-dts.patch @@ -0,0 +1,41 @@ +Subject: [PATCH] ARM: dts: qcom: ipq4019: Add SDHCI controller node +Date: Thu, 15 Aug 2019 19:28:23 +0200 +Message-Id: <20190815172823.12028-1-robimarko@gmail.com> +X-Mailer: git-send-email 2.21.0 +MIME-Version: 1.0 +Sender: linux-arm-msm-owner@vger.kernel.org +Precedence: bulk +List-ID: +X-Mailing-List: linux-arm-msm@vger.kernel.org +X-Virus-Scanned: ClamAV using ClamSMTP + +IPQ4019 has a built in SD/eMMC controller which is supported by the +SDHCI MSM driver, by the "qcom,sdhci-msm-v4" binding. +So lets add the appropriate node for it. + +Signed-off-by: Robert Marko +--- + arch/arm/boot/dts/qcom-ipq4019.dtsi | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -226,6 +226,18 @@ + status = "disabled"; + }; + ++ sdhci: sdhci@7824900 { ++ compatible = "qcom,sdhci-msm-v4"; ++ reg = <0x7824900 0x11c>, <0x7824000 0x800>; ++ interrupts = , ; ++ interrupt-names = "hc_irq", "pwr_irq"; ++ bus-width = <8>; ++ clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>, ++ <&gcc GCC_DCD_XO_CLK>; ++ clock-names = "core", "iface", "xo"; ++ status = "disabled"; ++ }; ++ + blsp_dma: dma@7884000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x07884000 0x23000>;