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mediatek: mt7622: fix SATA on BPi-R64
Two commits which made their way into Linux stable broke the SATA support on the BPi-R64. Fix this by reverting a node rename which broke DT-overlay application and import a (still pending) patch re-adding the 'syscon' compatible to the pciesys clock-controller which also contains phy-mode bits referenced by the ahci_mtk driver expecting to access them using syscon_regmap_lookup_by_phandle(). Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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From 4c4baed29b168e9bf39545a945a9523ea280cb44 Mon Sep 17 00:00:00 2001
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From: Daniel Golle <daniel@makrotopia.org>
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Date: Sat, 1 Feb 2025 04:24:17 +0000
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Subject: [PATCH 1/2] Revert "arm64: dts: mediatek: fix t-phy unit name"
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This reverts commit 963c3b0c47ec29b4c49c9f45965cd066f419d17f.
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---
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arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
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arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 2 +-
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2 files changed, 2 insertions(+), 2 deletions(-)
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--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
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@@ -908,7 +908,7 @@
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status = "disabled";
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};
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- sata_phy: t-phy {
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+ sata_phy: t-phy@1a243000 {
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compatible = "mediatek,mt7622-tphy",
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"mediatek,generic-tphy-v1";
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#address-cells = <2>;
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--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
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@@ -428,7 +428,7 @@
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};
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};
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- pcie_phy: t-phy {
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+ pcie_phy: t-phy@11c00000 {
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compatible = "mediatek,mt7986-tphy",
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"mediatek,generic-tphy-v2";
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ranges;
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@ -0,0 +1,33 @@
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From 98bc223d174c7f544e8f6c4f0caa8fa144f2f4dc Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Fri, 28 Jun 2024 12:55:40 +0200
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Subject: [PATCH 2/2] arm64: dts: mediatek: mt7622: readd syscon to pciesys
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node
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Sata node reference the pciesys with the property mediatek,phy-node
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and that is used as a syscon to access the pciesys regs.
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Readd the syscon compatible to pciesys node to restore correct
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functionality of the SATA interface.
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Fixes: 3ba5a6159434 ("arm64: dts: mediatek: mt7622: fix clock controllers")
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Reported-by: Frank Wunderlich <frank-w@public-files.de>
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Co-developed-by: Frank Wunderlich <frank-w@public-files.de>
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Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Cc: stable@vger.kernel.org
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---
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arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
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@@ -798,7 +798,7 @@
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};
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pciesys: clock-controller@1a100800 {
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- compatible = "mediatek,mt7622-pciesys";
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+ compatible = "mediatek,mt7622-pciesys", "syscon";
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reg = <0 0x1a100800 0 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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