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mac80211: rt2x00: some improvements for rt2800 generic
1. Respect the rt2800 hardware TX queue index.
2. Increase the watchdog sampling frequency.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Link: https://github.com/openwrt/openwrt/pull/16845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 70733c6093
)
This commit is contained in:
parent
e63d289bbd
commit
5679b7aef6
@ -0,0 +1,257 @@
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From 654653e718f6c55c6f29fd94cc8152a92c8166ac Mon Sep 17 00:00:00 2001
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From: Shiji Yang <yangshiji66@outlook.com>
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Date: Tue, 24 Dec 2024 08:36:32 +0800
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Subject: [PATCH 1/2] rt2x00: respect the rt2800 hardware TX queue index
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The Ralink TX queue register index is different from the Linux
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IEEE80211 queue id definition. Their conversion table is as follows:
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Queue IEEE80211 Ralink
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AC_VO 0 3
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AC_VI 1 2
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AC_BE 2 0
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AC_BK 3 1
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The TX queues are still functioning properly under the current
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configuration. I don't have evidence, but I believe there should
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be some differences in the internal hardware implementation of
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different TX queues, e.g. interrupt priority. so it's better to
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respect the queue index defined by the Ralink when we construct
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the TX rings and descriptors.
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And the more important thing is that we are using the wrong queue
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index to calculate the register offset and mask in .conf_tx(),
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which resulted in writing incorrect AIFSN, CWMAX, CWMIN and TXOP
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values for all TX queues. This patch introduces a index conversion
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table to fix these parameters.
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Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
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---
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drivers/net/wireless/ralink/rt2x00/rt2800.h | 24 ++++++------
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.../net/wireless/ralink/rt2x00/rt2800lib.c | 20 +++++++---
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.../net/wireless/ralink/rt2x00/rt2800mmio.c | 38 ++++++++++---------
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.../net/wireless/ralink/rt2x00/rt2x00queue.h | 20 ++++++++++
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4 files changed, 67 insertions(+), 35 deletions(-)
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--- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
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+++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
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@@ -379,10 +379,10 @@
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/*
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* WMM_AIFSN_CFG: Aifsn for each EDCA AC
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- * AIFSN0: AC_VO
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- * AIFSN1: AC_VI
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- * AIFSN2: AC_BE
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- * AIFSN3: AC_BK
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+ * AIFSN0: AC_BE
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+ * AIFSN1: AC_BK
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+ * AIFSN2: AC_VI
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+ * AIFSN3: AC_VO
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*/
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#define WMM_AIFSN_CFG 0x0214
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#define WMM_AIFSN_CFG_AIFSN0 FIELD32(0x0000000f)
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@@ -392,10 +392,10 @@
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/*
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* WMM_CWMIN_CSR: CWmin for each EDCA AC
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- * CWMIN0: AC_VO
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- * CWMIN1: AC_VI
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- * CWMIN2: AC_BE
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- * CWMIN3: AC_BK
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+ * CWMIN0: AC_BE
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+ * CWMIN1: AC_BK
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+ * CWMIN2: AC_VI
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+ * CWMIN3: AC_VO
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*/
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#define WMM_CWMIN_CFG 0x0218
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#define WMM_CWMIN_CFG_CWMIN0 FIELD32(0x0000000f)
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@@ -405,10 +405,10 @@
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/*
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* WMM_CWMAX_CSR: CWmax for each EDCA AC
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- * CWMAX0: AC_VO
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- * CWMAX1: AC_VI
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- * CWMAX2: AC_BE
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- * CWMAX3: AC_BK
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+ * CWMAX0: AC_BE
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+ * CWMAX1: AC_BK
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+ * CWMAX2: AC_VI
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+ * CWMAX3: AC_VO
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*/
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#define WMM_CWMAX_CFG 0x021c
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#define WMM_CWMAX_CFG_CWMAX0 FIELD32(0x0000000f)
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--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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@@ -835,7 +835,8 @@ void rt2800_write_tx_data(struct queue_e
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txdesc->key_idx : txdesc->u.ht.wcid);
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rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT,
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txdesc->length);
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- rt2x00_set_field32(&word, TXWI_W1_PACKETID_QUEUE, entry->queue->qid);
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+ rt2x00_set_field32(&word, TXWI_W1_PACKETID_QUEUE,
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+ rt2x00_ac_to_hwq(entry->queue->qid));
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rt2x00_set_field32(&word, TXWI_W1_PACKETID_ENTRY, (entry->entry_idx % 3) + 1);
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rt2x00_desc_write(txwi, 1, word);
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@@ -1125,6 +1126,12 @@ void rt2800_txdone(struct rt2x00_dev *rt
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u32 reg;
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u8 qid;
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bool match;
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+ static const u8 rt2ac[] = {
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+ IEEE80211_AC_BE,
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+ IEEE80211_AC_BK,
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+ IEEE80211_AC_VI,
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+ IEEE80211_AC_VO,
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+ };
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while (quota-- > 0 && kfifo_get(&rt2x00dev->txstatus_fifo, ®)) {
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/*
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@@ -1132,6 +1139,8 @@ void rt2800_txdone(struct rt2x00_dev *rt
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* guaranteed to be one of the TX QIDs .
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*/
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qid = rt2x00_get_field32(reg, TX_STA_FIFO_PID_QUEUE);
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+ /* Convert Ralink hardware queue index to IEEE80211 queue id. */
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+ qid = rt2ac[qid];
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queue = rt2x00queue_get_tx_queue(rt2x00dev, qid);
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if (unlikely(rt2x00queue_empty(queue))) {
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@@ -12188,8 +12197,9 @@ int rt2800_conf_tx(struct ieee80211_hw *
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queue = rt2x00queue_get_tx_queue(rt2x00dev, queue_idx);
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/* Update WMM TXOP register */
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- offset = WMM_TXOP0_CFG + (sizeof(u32) * (!!(queue_idx & 2)));
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- field.bit_offset = (queue_idx & 1) * 16;
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+ offset = WMM_TXOP0_CFG +
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+ (sizeof(u32) * (!!(rt2x00_ac_to_hwq(queue_idx) & 2)));
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+ field.bit_offset = (rt2x00_ac_to_hwq(queue_idx) & 1) * 16;
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field.bit_mask = 0xffff << field.bit_offset;
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reg = rt2800_register_read(rt2x00dev, offset);
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@@ -12197,7 +12207,7 @@ int rt2800_conf_tx(struct ieee80211_hw *
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rt2800_register_write(rt2x00dev, offset, reg);
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/* Update WMM registers */
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- field.bit_offset = queue_idx * 4;
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+ field.bit_offset = rt2x00_ac_to_hwq(queue_idx) * 4;
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field.bit_mask = 0xf << field.bit_offset;
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reg = rt2800_register_read(rt2x00dev, WMM_AIFSN_CFG);
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@@ -12213,7 +12223,7 @@ int rt2800_conf_tx(struct ieee80211_hw *
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rt2800_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
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/* Update EDCA registers */
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- offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
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+ offset = EDCA_AC0_CFG + (sizeof(u32) * rt2x00_ac_to_hwq(queue_idx));
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reg = rt2800_register_read(rt2x00dev, offset);
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rt2x00_set_field32(®, EDCA_AC0_CFG_TX_OP, queue->txop);
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--- a/drivers/net/wireless/ralink/rt2x00/rt2800mmio.c
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+++ b/drivers/net/wireless/ralink/rt2x00/rt2800mmio.c
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@@ -35,7 +35,7 @@ unsigned int rt2800mmio_get_dma_done(str
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case QID_AC_VI:
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case QID_AC_BE:
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case QID_AC_BK:
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- qid = queue->qid;
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+ qid = rt2x00_ac_to_hwq(queue->qid);
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idx = rt2x00mmio_register_read(rt2x00dev, TX_DTX_IDX(qid));
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break;
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case QID_MGMT:
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@@ -456,6 +456,7 @@ void rt2800mmio_kick_queue(struct data_q
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{
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struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
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struct queue_entry *entry;
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+ u8 qid;
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switch (queue->qid) {
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case QID_AC_VO:
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@@ -464,7 +465,8 @@ void rt2800mmio_kick_queue(struct data_q
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case QID_AC_BK:
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WARN_ON_ONCE(rt2x00queue_empty(queue));
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entry = rt2x00queue_get_entry(queue, Q_INDEX);
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- rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(queue->qid),
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+ qid = rt2x00_ac_to_hwq(queue->qid);
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+ rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(qid),
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entry->entry_idx);
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hrtimer_start(&rt2x00dev->txstatus_timer,
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TXSTATUS_TIMEOUT, HRTIMER_MODE_REL);
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@@ -666,36 +668,36 @@ int rt2800mmio_init_queues(struct rt2x00
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* Initialize registers.
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*/
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entry_priv = rt2x00dev->tx[0].entries[0].priv_data;
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- rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR0,
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+ rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR3,
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entry_priv->desc_dma);
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- rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT0,
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+ rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT3,
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rt2x00dev->tx[0].limit);
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- rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX0, 0);
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- rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX0, 0);
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+ rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX3, 0);
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+ rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX3, 0);
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entry_priv = rt2x00dev->tx[1].entries[0].priv_data;
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- rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR1,
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+ rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR2,
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entry_priv->desc_dma);
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- rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT1,
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+ rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT2,
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rt2x00dev->tx[1].limit);
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- rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX1, 0);
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- rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX1, 0);
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+ rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX2, 0);
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+ rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX2, 0);
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entry_priv = rt2x00dev->tx[2].entries[0].priv_data;
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- rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR2,
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+ rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR0,
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entry_priv->desc_dma);
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- rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT2,
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+ rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT0,
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rt2x00dev->tx[2].limit);
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- rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX2, 0);
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- rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX2, 0);
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+ rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX0, 0);
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+ rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX0, 0);
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entry_priv = rt2x00dev->tx[3].entries[0].priv_data;
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- rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR3,
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+ rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR1,
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entry_priv->desc_dma);
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- rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT3,
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+ rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT1,
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rt2x00dev->tx[3].limit);
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- rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX3, 0);
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- rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX3, 0);
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+ rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX1, 0);
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+ rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX1, 0);
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rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR4, 0);
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rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT4, 0);
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--- a/drivers/net/wireless/ralink/rt2x00/rt2x00queue.h
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+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00queue.h
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@@ -57,6 +57,26 @@ enum data_queue_qid {
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};
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/**
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+ * rt2x00_ac_to_hwq - Convert IEEE80211 queue id to Ralink hardware
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+ * queue register index.
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+ * @ac: TX queue id.
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+ */
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+static inline u8 rt2x00_ac_to_hwq(enum data_queue_qid ac)
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+{
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+ static const u8 ralink_queue_map[] = {
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+ [IEEE80211_AC_BE] = 0,
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+ [IEEE80211_AC_BK] = 1,
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+ [IEEE80211_AC_VI] = 2,
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+ [IEEE80211_AC_VO] = 3,
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+ };
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+
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+ if (unlikely(ac >= IEEE80211_NUM_ACS))
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+ return ac;
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+
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+ return ralink_queue_map[ac];
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+}
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+
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+/**
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* enum skb_frame_desc_flags: Flags for &struct skb_frame_desc
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*
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* @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
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@ -0,0 +1,74 @@
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From aec50d1a30349759de0ac535f54c3441bf7ebef7 Mon Sep 17 00:00:00 2001
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From: Shiji Yang <yangshiji66@outlook.com>
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Date: Sun, 22 Dec 2024 17:06:59 +0800
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Subject: [PATCH 2/2] rt2x00: increase the watchdog sampling frequency
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Increase the sampling frequency of the watchdog when the hung
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counter reaches the threshold to avoid some unnecessary resets.
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Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
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---
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.../net/wireless/ralink/rt2x00/rt2800lib.c | 45 +++++++++++++------
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1 file changed, 32 insertions(+), 13 deletions(-)
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--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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@@ -1320,26 +1320,45 @@ static bool rt2800_watchdog_hung(struct
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return true;
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}
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+static inline bool check_dma_busy_rx(u32 reg_cfg, u32 reg_int)
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+{
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+ return (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_RX_DMA_BUSY) &&
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+ rt2x00_get_field32(reg_int, INT_SOURCE_CSR_RX_COHERENT));
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+}
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+
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+static inline bool check_dma_busy_tx(u32 reg_cfg, u32 reg_int)
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+{
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+ return (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
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+ rt2x00_get_field32(reg_int, INT_SOURCE_CSR_TX_COHERENT));
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+}
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+
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static bool rt2800_watchdog_dma_busy(struct rt2x00_dev *rt2x00dev)
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{
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bool busy_rx, busy_tx;
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u32 reg_cfg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
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u32 reg_int = rt2800_register_read(rt2x00dev, INT_SOURCE_CSR);
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- if (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_RX_DMA_BUSY) &&
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- rt2x00_get_field32(reg_int, INT_SOURCE_CSR_RX_COHERENT))
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- rt2x00dev->rxdma_busy++;
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- else
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- rt2x00dev->rxdma_busy = 0;
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-
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- if (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
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- rt2x00_get_field32(reg_int, INT_SOURCE_CSR_TX_COHERENT))
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- rt2x00dev->txdma_busy++;
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- else
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- rt2x00dev->txdma_busy = 0;
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+ rt2x00dev->rxdma_busy = check_dma_busy_rx(reg_cfg, reg_int) ?
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+ rt2x00dev->rxdma_busy + 1 : 0;
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+ rt2x00dev->txdma_busy = check_dma_busy_tx(reg_cfg, reg_int) ?
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+ rt2x00dev->txdma_busy + 1 : 0;
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+
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+ if (rt2x00dev->rxdma_busy > 25 || rt2x00dev->txdma_busy > 25) {
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+ int cnt;
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+ for (cnt = 0; cnt < 10; cnt++) {
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+ msleep(5);
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+ reg_cfg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
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+ reg_int = rt2800_register_read(rt2x00dev, INT_SOURCE_CSR);
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+
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+ if (!check_dma_busy_rx(reg_cfg, reg_int))
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+ rt2x00dev->rxdma_busy = 0;
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+ if (!check_dma_busy_tx(reg_cfg, reg_int))
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+ rt2x00dev->txdma_busy = 0;
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+ }
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+ }
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- busy_rx = rt2x00dev->rxdma_busy > 30;
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- busy_tx = rt2x00dev->txdma_busy > 30;
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+ busy_rx = rt2x00dev->rxdma_busy > 40;
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+ busy_tx = rt2x00dev->txdma_busy > 40;
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if (!busy_rx && !busy_tx)
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return false;
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@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
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[EEPROM_CHIP_ID] = 0x0000,
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[EEPROM_VERSION] = 0x0001,
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@@ -10404,8 +10422,10 @@ static void rt2800_calibration_rt6352(st
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@@ -10432,8 +10450,10 @@ static void rt2800_calibration_rt6352(st
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u32 reg;
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if (rt2x00_has_cap_external_pa(rt2x00dev) ||
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@ -64,7 +64,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
|
||||
|
||||
rt2800_r_calibration(rt2x00dev);
|
||||
rt2800_rf_self_txdc_cal(rt2x00dev);
|
||||
@@ -10423,6 +10443,8 @@ static void rt2800_calibration_rt6352(st
|
||||
@@ -10451,6 +10471,8 @@ static void rt2800_calibration_rt6352(st
|
||||
!rt2x00_has_cap_external_lna_bg(rt2x00dev))
|
||||
return;
|
||||
|
||||
|
@ -14,7 +14,7 @@
|
||||
*/
|
||||
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
|
||||
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
|
||||
@@ -3836,14 +3836,16 @@ static void rt2800_config_channel_rf7620
|
||||
@@ -3864,14 +3864,16 @@ static void rt2800_config_channel_rf7620
|
||||
rt2x00_set_field8(&rfcsr, RFCSR19_K, rf->rf4);
|
||||
rt2800_rfcsr_write(rt2x00dev, 19, rfcsr);
|
||||
|
||||
@ -39,7 +39,7 @@
|
||||
|
||||
rfcsr = rt2800_rfcsr_read(rt2x00dev, 1);
|
||||
rt2x00_set_field8(&rfcsr, RFCSR1_TX2_EN_MT7620,
|
||||
@@ -3877,18 +3879,23 @@ static void rt2800_config_channel_rf7620
|
||||
@@ -3905,18 +3907,23 @@ static void rt2800_config_channel_rf7620
|
||||
rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x20);
|
||||
}
|
||||
|
||||
@ -73,7 +73,7 @@
|
||||
|
||||
if (!test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) {
|
||||
if (conf_is_ht40(conf)) {
|
||||
@@ -4002,25 +4009,29 @@ static void rt2800_config_alc_rt6352(str
|
||||
@@ -4030,25 +4037,29 @@ static void rt2800_config_alc_rt6352(str
|
||||
if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY)))
|
||||
rt2x00_warn(rt2x00dev, "RF busy while configuring ALC\n");
|
||||
|
||||
@ -121,7 +121,7 @@
|
||||
rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, mac_sys_ctrl);
|
||||
|
||||
rt2800_vco_calibration(rt2x00dev);
|
||||
@@ -4513,7 +4524,8 @@ static void rt2800_config_channel(struct
|
||||
@@ -4541,7 +4552,8 @@ static void rt2800_config_channel(struct
|
||||
if (rt2x00_rt(rt2x00dev, RT6352)) {
|
||||
/* BBP for GLRT BW */
|
||||
bbp = conf_is_ht40(conf) ?
|
||||
@ -131,7 +131,7 @@
|
||||
0x15 : 0x1a;
|
||||
rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
|
||||
|
||||
@@ -6017,18 +6029,33 @@ static int rt2800_init_registers(struct
|
||||
@@ -6045,18 +6057,33 @@ static int rt2800_init_registers(struct
|
||||
} else if (rt2x00_rt(rt2x00dev, RT5350)) {
|
||||
rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
|
||||
} else if (rt2x00_rt(rt2x00dev, RT6352)) {
|
||||
@ -177,7 +177,7 @@
|
||||
reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
|
||||
rt2x00_set_field32(®, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
|
||||
rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
|
||||
@@ -7141,14 +7168,16 @@ static void rt2800_init_bbp_6352(struct
|
||||
@@ -7169,14 +7196,16 @@ static void rt2800_init_bbp_6352(struct
|
||||
rt2800_bbp_write(rt2x00dev, 188, 0x00);
|
||||
rt2800_bbp_write(rt2x00dev, 189, 0x00);
|
||||
|
||||
@ -202,7 +202,7 @@
|
||||
|
||||
/* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
|
||||
rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
|
||||
@@ -10378,6 +10407,9 @@ static void rt2800_restore_rf_bbp_rt6352
|
||||
@@ -10406,6 +10435,9 @@ static void rt2800_restore_rf_bbp_rt6352
|
||||
rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
|
||||
}
|
||||
|
||||
@ -212,7 +212,7 @@
|
||||
if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
|
||||
rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
|
||||
rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
|
||||
@@ -10455,6 +10487,9 @@ static void rt2800_calibration_rt6352(st
|
||||
@@ -10483,6 +10515,9 @@ static void rt2800_calibration_rt6352(st
|
||||
rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
|
||||
}
|
||||
|
||||
@ -222,7 +222,7 @@
|
||||
if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
|
||||
rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
|
||||
rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
|
||||
@@ -10545,31 +10580,36 @@ static void rt2800_init_rfcsr_6352(struc
|
||||
@@ -10573,31 +10608,36 @@ static void rt2800_init_rfcsr_6352(struc
|
||||
rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
|
||||
rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
|
||||
|
||||
@ -284,7 +284,7 @@
|
||||
|
||||
/* Initialize RF channel register to default value */
|
||||
rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
|
||||
@@ -10635,63 +10675,71 @@ static void rt2800_init_rfcsr_6352(struc
|
||||
@@ -10663,63 +10703,71 @@ static void rt2800_init_rfcsr_6352(struc
|
||||
|
||||
rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
|
||||
|
||||
@ -411,7 +411,7 @@
|
||||
|
||||
/* Initialize RF DC calibration register to default value */
|
||||
rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
|
||||
@@ -10754,12 +10802,17 @@ static void rt2800_init_rfcsr_6352(struc
|
||||
@@ -10782,12 +10830,17 @@ static void rt2800_init_rfcsr_6352(struc
|
||||
rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
|
||||
rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user