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https://github.com/immortalwrt/immortalwrt
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x86: bypassing the HH3K up to 2.5Gbps using a BCM578xx
https://www.dslreports.com/forum/r32230041-Internet-Bypassing-the-HH3K-up-to-2-5Gbps-using-a-BCM57810S-NIC
This commit is contained in:
ntlf9t
Tianling Shen
parent
5014dc07ea
commit
a3c5c14c8b
@ -0,0 +1,216 @@
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--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
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+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
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@@ -1592,6 +1592,7 @@ struct bnx2x {
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uint num_ethernet_queues;
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uint num_cnic_queues;
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int disable_tpa;
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+ int mask_tx_fault;
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u32 rx_mode;
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#define BNX2X_RX_MODE_NONE 0
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--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
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+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
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@@ -151,6 +151,7 @@ typedef int (*read_sfp_module_eeprom_fun
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#define SFP_EEPROM_CON_TYPE_ADDR 0x2
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#define SFP_EEPROM_CON_TYPE_VAL_UNKNOWN 0x0
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+ #define SFP_EEPROM_CON_TYPE_VAL_SC 0x1
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#define SFP_EEPROM_CON_TYPE_VAL_LC 0x7
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#define SFP_EEPROM_CON_TYPE_VAL_COPPER 0x21
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#define SFP_EEPROM_CON_TYPE_VAL_RJ45 0x22
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@@ -4206,6 +4207,16 @@ static void bnx2x_warpcore_set_sgmii_spe
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0x1000);
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DP(NETIF_MSG_LINK, "set SGMII AUTONEG\n");
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} else {
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+ /* Note that 2.5G works only when used with 1G advertisment */
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+ if (fiber_mode && (phy->req_line_speed == SPEED_2500) &&
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+ (phy->speed_cap_mask &
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+ (PORT_HW_CFG_SPEED_CAPABILITY_D0_1G |
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+ PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G))) {
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+ bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD,
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+ MDIO_WC_REG_SERDESDIGITAL_MISC1,
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+ 0x6010);
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+ }
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+
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bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD,
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MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16);
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val16 &= 0xcebf;
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@@ -4216,6 +4227,7 @@ static void bnx2x_warpcore_set_sgmii_spe
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val16 |= 0x2000;
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break;
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case SPEED_1000:
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+ case SPEED_2500:
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val16 |= 0x0040;
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break;
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default:
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@@ -8169,6 +8181,7 @@ static int bnx2x_get_edc_mode(struct bnx
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break;
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}
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case SFP_EEPROM_CON_TYPE_VAL_UNKNOWN:
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+ case SFP_EEPROM_CON_TYPE_VAL_SC:
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case SFP_EEPROM_CON_TYPE_VAL_LC:
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case SFP_EEPROM_CON_TYPE_VAL_RJ45:
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check_limiting_mode = 1;
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@@ -8179,7 +8192,8 @@ static int bnx2x_get_edc_mode(struct bnx
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(val[SFP_EEPROM_1G_COMP_CODE_ADDR] != 0)) {
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DP(NETIF_MSG_LINK, "1G SFP module detected\n");
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phy->media_type = ETH_PHY_SFP_1G_FIBER;
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- if (phy->req_line_speed != SPEED_1000) {
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+ if ((phy->req_line_speed != SPEED_1000) &&
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+ (phy->req_line_speed != SPEED_2500)) {
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u8 gport = params->port;
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phy->req_line_speed = SPEED_1000;
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if (!CHIP_IS_E1x(bp)) {
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@@ -8339,7 +8353,7 @@ static int bnx2x_wait_for_sfp_module_ini
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* some phys type ( e.g. JDSU )
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*/
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- for (timeout = 0; timeout < 60; timeout++) {
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+ for (timeout = 0; timeout < 1800; timeout++) {
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if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT)
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rc = bnx2x_warpcore_read_sfp_module_eeprom(
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phy, params, I2C_DEV_ADDR_A0, 1, 1, &val,
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@@ -9238,6 +9252,7 @@ static void bnx2x_8727_config_speed(stru
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u16 tmp1, val;
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/* Set option 1G speed */
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if ((phy->req_line_speed == SPEED_1000) ||
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+ (phy->req_line_speed == SPEED_2500) ||
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(phy->media_type == ETH_PHY_SFP_1G_FIBER)) {
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DP(NETIF_MSG_LINK, "Setting 1G force\n");
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bnx2x_cl45_write(bp, phy,
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@@ -9247,6 +9262,22 @@ static void bnx2x_8727_config_speed(stru
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bnx2x_cl45_read(bp, phy,
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MDIO_PMA_DEVAD, MDIO_PMA_REG_10G_CTRL2, &tmp1);
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DP(NETIF_MSG_LINK, "1.7 = 0x%x\n", tmp1);
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+ if ((phy->req_line_speed == SPEED_2500) &&
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+ (phy->speed_cap_mask &
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+ (PORT_HW_CFG_SPEED_CAPABILITY_D0_1G |
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+ PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G))) {
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+ bnx2x_cl45_read_and_write(bp, phy,
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+ MDIO_AN_DEVAD,
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+ MDIO_AN_REG_8727_MISC_CTRL2,
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+ ~(1<<5));
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+ bnx2x_cl45_write(bp, phy,
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+ MDIO_AN_DEVAD,
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+ MDIO_AN_REG_8727_MISC_CTRL1, 0x0010);
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+ } else {
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+ bnx2x_cl45_write(bp, phy,
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+ MDIO_AN_DEVAD,
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+ MDIO_AN_REG_8727_MISC_CTRL1, 0x001C);
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+ }
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/* Power down the XAUI until link is up in case of dual-media
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* and 1G
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*/
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@@ -9268,7 +9299,7 @@ static void bnx2x_8727_config_speed(stru
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DP(NETIF_MSG_LINK, "Setting 1G clause37\n");
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bnx2x_cl45_write(bp, phy,
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- MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL, 0);
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+ MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL2, 0);
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bnx2x_cl45_write(bp, phy,
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MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1300);
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} else {
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@@ -9276,9 +9307,12 @@ static void bnx2x_8727_config_speed(stru
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* registers although it is default
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*/
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bnx2x_cl45_write(bp, phy,
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- MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL,
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+ MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL2,
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0x0020);
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bnx2x_cl45_write(bp, phy,
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+ MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL1,
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+ 0x001C);
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+ bnx2x_cl45_write(bp, phy,
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MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x0100);
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bnx2x_cl45_write(bp, phy,
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MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0x2040);
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@@ -9569,6 +9603,11 @@ static u8 bnx2x_8727_read_status(struct
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vars->line_speed = SPEED_10000;
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DP(NETIF_MSG_LINK, "port %x: External link up in 10G\n",
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params->port);
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+ } else if ((link_status & (1<<1)) && (!(link_status & (1<<14)))) {
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+ link_up = 1;
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+ vars->line_speed = SPEED_2500;
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+ DP(NETIF_MSG_LINK, "port %x: External link up in 2.5G\n",
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+ params->port);
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} else if ((link_status & (1<<0)) && (!(link_status & (1<<13)))) {
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link_up = 1;
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vars->line_speed = SPEED_1000;
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@@ -9600,7 +9639,8 @@ static u8 bnx2x_8727_read_status(struct
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}
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if ((DUAL_MEDIA(params)) &&
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- (phy->req_line_speed == SPEED_1000)) {
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+ ((phy->req_line_speed == SPEED_1000) ||
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+ (phy->req_line_speed == SPEED_2500))) {
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bnx2x_cl45_read(bp, phy,
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MDIO_PMA_DEVAD,
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MDIO_PMA_REG_8727_PCS_GP, &val1);
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@@ -11730,6 +11770,7 @@ static const struct bnx2x_phy phy_warpco
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SUPPORTED_100baseT_Full |
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SUPPORTED_1000baseT_Full |
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SUPPORTED_1000baseKX_Full |
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+ SUPPORTED_2500baseX_Full |
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SUPPORTED_10000baseT_Full |
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SUPPORTED_10000baseKR_Full |
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SUPPORTED_20000baseKR2_Full |
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@@ -11916,6 +11957,7 @@ static const struct bnx2x_phy phy_8727 =
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.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
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.mdio_ctrl = 0,
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.supported = (SUPPORTED_10000baseT_Full |
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+ SUPPORTED_2500baseX_Full |
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SUPPORTED_1000baseT_Full |
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SUPPORTED_FIBRE |
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SUPPORTED_Pause |
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@@ -12263,6 +12305,7 @@ static int bnx2x_populate_int_phy(struct
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break;
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case PORT_HW_CFG_NET_SERDES_IF_SFI:
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phy->supported &= (SUPPORTED_1000baseT_Full |
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+ SUPPORTED_2500baseX_Full |
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SUPPORTED_10000baseT_Full |
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SUPPORTED_FIBRE |
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SUPPORTED_Pause |
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@@ -13947,7 +13990,8 @@ void bnx2x_period_func(struct link_param
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& PORT_HW_CFG_NET_SERDES_IF_MASK) ==
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PORT_HW_CFG_NET_SERDES_IF_SFI) {
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if (bnx2x_is_sfp_module_plugged(phy, params)) {
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- bnx2x_sfp_tx_fault_detection(phy, params, vars);
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+ if(!((params->port + 1) & bp->mask_tx_fault))
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+ bnx2x_sfp_tx_fault_detection(phy, params, vars);
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} else if (vars->link_status &
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LINK_STATUS_SFP_TX_FAULT) {
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/* Clean trail, interrupt corrects the leds */
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--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
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+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
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@@ -105,6 +105,10 @@ static int disable_tpa;
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module_param(disable_tpa, int, 0444);
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MODULE_PARM_DESC(disable_tpa, " Disable the TPA (LRO) feature");
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+static int mask_tx_fault;
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+module_param(mask_tx_fault, int, 0444);
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+MODULE_PARM_DESC(mask_tx_fault, " Mask SFP TX fault detection");
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+
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static int int_mode;
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module_param(int_mode, int, 0444);
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MODULE_PARM_DESC(int_mode, " Force interrupt mode other than MSI-X "
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@@ -12455,6 +12459,8 @@ static int bnx2x_init_bp(struct bnx2x *b
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if (BP_NOMCP(bp) && (func == 0))
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dev_err(&bp->pdev->dev, "MCP disabled, must load devices in order!\n");
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+ bp->mask_tx_fault = mask_tx_fault;
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+
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bp->disable_tpa = disable_tpa;
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bp->disable_tpa |= !!IS_MF_STORAGE_ONLY(bp);
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/* Reduce memory usage in kdump environment by disabling TPA */
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--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
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+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
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@@ -7169,7 +7169,8 @@ Theotherbitsarereservedandshouldbezero*/
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#define MDIO_PMA_REG_8727_PCS_GP 0xc842
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#define MDIO_PMA_REG_8727_OPT_CFG_REG 0xc8e4
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-#define MDIO_AN_REG_8727_MISC_CTRL 0x8309
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+#define MDIO_AN_REG_8727_MISC_CTRL1 0x8308
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+#define MDIO_AN_REG_8727_MISC_CTRL2 0x8309
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#define MDIO_PMA_REG_8073_CHIP_REV 0xc801
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#define MDIO_PMA_REG_8073_SPEED_LINK_STATUS 0xc820
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